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The full text of this question reads: What do we mean by say, 45 nanometer (45 nm) process in semiconductor fabrication? Does it refer to smallest component size or the wafer thickness? What are the difficulties and the limits in reducing the size?
It is neither. Semiconductor fabrication processes are classified according to a critical dimension (CD) rating. To understand what it means, we have to look at how semiconductors are fabricated, and it’s easier to start with the process as it existed about 20 years ago (please don’t hold me to the dates), then see how it has advanced.
Semiconductor devices (such as microprocessors, FPGAs, and other ICs) are fabricated by a photolithography process on disk-shaped silicon blanks called “wafers.” Semiconductor device fabrication facilities (called “fabs”) start with these wafers, and lay down “patterns” of dopants, polycrystalline silicon, metal conductors, and plain old glass (actually, pure silicon dioxide) onto the polished surface. Using repeated steps of applying material in layers, then etching it back, they built up microscopic electronic components that form the circuits. Patterns of protective photoresist protect those parts of the layer that aren’t supposed to be etched away.
Photoresist is very similar to the photographic emulsion applied to photographic film. It starts as a light-sensitive coating applied to the entire wafer surface. The places you want not to be etched are exposed to bright light, while the areas to be removed are kept in the dark. Just as in the photographic film process, the wafer goes through a developing process that removes all the photoresist that wasn’t exposed to light, leaving a hard, chemically resistive coating over the areas to be protected. A trip through an acid bath removes the unprotected material. A second chemical treatment dissolves the protective photoresist. The wafer then goes back to the beginning for the next layer of active material.
The whole process hinges on exposing the photoresist in just the pattern you want for the finished layer. That’s possible with a machine called a “stepper.” Steppers are conceptually simple, but their performance requirements are extreme.
There are two subsystems in a stepper: optical and mechanical. The optical system creates a de-magnified image of a mask — a thin metal sheet with holes cut in the exact pattern required for the IC features being laid down in that layer, but many times larger. A bright light behind the mask shines through the holes. A lens system forms a microscopic image on the photoresist-covered wafer, and voila the correct pattern registers in the photoresist.
A wafer stepper forms multiple images of each IC layer on a semiconductor wafer.
The mechanical system gives the stepper its name. It precisely moves the wafer a step at a time to lay down many IC images on a single wafer. The stepper makes it possible to make hundreds of ICs on each wafer.
Changes that have been made since the late 1980s revolve around numbers. Wafer diameters have risen in stages so that 300 mm (12 in) wafers are now common. The number of transistors making up a single IC has risen from hundreds of thousands into tens of millions.
Interestingly, the dimensions of each IC have remained pretty much constant at 0.5 to 1.0 cm because the sizes of the transistors have shrunk enormously because of reductions in the critical dimension. That is the size of the smallest features the process can fabricate.
If we want to create a microscopic letter “L,” in a sans serif font, like Helvetica, the critical dimension is not the height of the letter. It’s the width of the narrowest line in the font. So an L 100 microns high and 50 microns wide drawn with lines 5 microns thick has a critical dimension of 5 microns. The limit to which you can scale down the whole feature is the CD
There are a number of constraints that limit the minimum critical dimension, but the most onerous of them is the wavelength of the electromagnetic radiation used to expose the photoresist. The rule of thumb is that conventional optical systems cannot resolve critical dimensions smaller than about 25% of the wavelength of the light used to form the image. In the late 1980s, that was blue light from a mercury vapor lamp at about 400 nm. Thus, the CD limit was about 100 nm.
To reach the 45 nm CD mentioned in the question, the radiation used can have a wavelength no more than 180 nm. This falls into what photolithographers call “deep ultraviolet” or DUV. So, one of the barriers to shrinking CDs is developing equipment capable of forming diffraction-limited images. Every time stepper makers go to a shorter wavelength, they have to develop new optical glasses, coatings, and photoresist chemistries.
There are many other problems that stepper makers have to solve as well. Registration is another example. It makes no nevermind how sharp the image is for each layer if you can’t lay the next layer down precisely on top of it. So, mechanical repeatability has to be as good as the CD spec or better. Of course, vibration is a major problem. You can’t hold 45 nm CD if the whole machine is jumping around by, say, 145 nm between exposures. At some point (and I have no numbers for this) thermal motions of the atoms making up the stepper and wafer will become a problem!
Finally, we will eventually run into the granular nature of matter. Atoms have diameters on the order of 0.1 nm. What is the minimum number of silicon atoms needed to make a viable transistor? I'm not sure anyone has figured that out, yet.
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